Power Optimization of Delay Constrained Circuits
نویسندگان
چکیده
منابع مشابه
Power Optimization of Delay Constrained Circuits
We present a framework for combining Voltage Scaling and Gate sizing techniques for power optimizations. Our results show that the combination of the two techniques perform better than the techniques applied in isolation. We introduce a new heuristic for choosing gates for sizing and voltage scaling such that the total power is minimized under delay constraints. We also use a more accurate esti...
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ژورنال
عنوان ژورنال: VLSI Design
سال: 2001
ISSN: 1065-514X,1563-5171
DOI: 10.1155/2001/65638